1. Navigate to your project directory (in this case C:/altera/mySystems/system1)
2. Open the Quartus project file (.qpf) in our case NiosII.qpf
   1. Quartus Should now open with your project
3. Double click on NiosII under the “Entity” window on the left
   1. This should have a opened the NiosII.bdf file in the center of Quartus II
   2. If NiosII is not your top level entity (ie: shows as the highest element in the entity windows) preform the following, if it is the top most entity already then skip to step 4
      1. In the left hand pane next to Hierarchy click on Files
      2. Right click on NIosII.bdf
      3. Select Set as Top-Level Entity As shown below
4. Go to Project --> Add/Remove Files in Project...
   1. In the settings pop up go to Files
   2. Next to filename click on the ... icon
      1. Find NiosII.bdf (note this file might already be added, if it is already added skip to step iv)
      2. Click open
      3. Click add
      4. Find niosiiStsyem.qip (the file we generated in Qsys located in system1/niosiiSystem/synthesis) You might have to change the file type to IP Variation (.qip .sip)
      5. Click open
      6. Click add
   3. Click Apply
   4. Click OK
5. Go to Assignments --> device
   1. Click device and pin options
   2. Click Unused Pins
      1. For Reserve all unused pins select As input tri-stated

1. Double Click on the work space area (the area with a dot pattern)
   1. In the Symbol popup menu under name clink the ... button
   2. Navigate to the niosiiSystem.bsf that we created in Qsys (system1\niosiiSystem)
   3. Select niosiiSystem.bsf
   4. Click open
   5. A preview should now appear in the symbol popup
   6. Click OK in the symbol popup
2. Place the block diagram anywhere on the workspace by clicking

Note: Pin names are case sensitive

Note: to make multiple bit connections to one pin use the format “PINNAME[X..Y]” where X is the most significant bit and Y is the least significant bit

Green Lines are Bidirectional Pins

Blue Lines are Input Pins

Purple Lines are Output Pins

1. Navigate to your project folder and find the file niosII.qsf (system1\niosII.qsf)
2. Open the .qsf file in a text editor like notepad
3. At the bottom of the file past in the contents of the .qsf file found at http://fpga.seanwrall.com/lessons/lesson3/ (Download DE2-115 .qsf file addon (TXT))
   1. Save the file
4. Place a pin by clicking on Add a pin in the workspace tool bar
   1. Select the pin you need from he drop-down (input, output, bidirectional)
   2. Place the pin by clinking on the workspace where you want the pin to be placed
   3. When done placing the pin press Esc to stop placing more pins
      1. For this example we need two inputs and one output
5. Connect the pins to the device by dragging from the device to the pin (not from the pin to the device)
6. Name the pins the corresponding values in the .csv file found at http://fpga.seanwrall.com/lessons/lesson3/ (Download DE2-115 Pin Assignment (CSV))
   1. For us the clk_clk should be named CLOCK_50
   2. For us the green_leds_export[7..0] should be named LEDG[7..0]
   3. For us the reset_reset_n should be named KEY[0]

1. Click start compilation (the purple arrow in the too bar)
2. The progress of the compilation will be shown in the lower left and in the console window at the bottom
3. When done the console window will display Quartus II Full Compilation was successful. 0 errors
   1. You do not want errors here but warnings are OK